At present, Silicon-On-Insulator (SOI) wafers, which are semiconductor substrates capable of providing semiconductor devices with high performance, have been highly regarded widely. An SOI wafer includes a silicon substrate, an insulating layer and a top silicon layer. Such a structure can be advantageous in that: (1) it can be used to manufacture a large scale integrated circuit with lines of less than 0.1 μm to thereby eliminate various parasitic effects due to manufacturing of such highly integrated devices in bulk silicon; (2) it can be used to manufacture high-speed and low-power-consumption semiconductor devices required for various mini apparatus; (3) it can be used to manufacture a semiconductor device against nuclear radiation; and (4) local isolation of MOS devices can be formed to boost an allowable operating voltage of the isolated devices. Therefore, the SOI material has been commonly recognized in the industry as a basic material for the future predominant industry of large scale integrated circuits.
There are three existing methods for manufacturing an SOI material, the first of which is referred to as Separation by Implanted Oxygen, which is the main method currently adopted for manufacturing the SOI material. As illustrated in FIG. 1, this method generally includes preparing a monocrystalline silicon wafer 1, implanting oxygen ions 2 into the monocrystalline silicon wafer and forming an insulating layer 3 in the monocrystalline silicon wafer 1 through annealing at a high temperature. Such an insulating layer separates the original monocrystalline silicon wafer 1 into two parts, i.e., a top silicon layer 4 and a silicon substrate 5.
The second method is referred to as “Bonding SOI”, which forms an SOI wafer of excellent quality. In this method as illustrated in FIG. 2, the surfaces of a first monocrystalline silicon wafer 10 and of a second monocrystalline silicon wafer 12 are bonded tightly to each other, wherein, an insulating layer 14 formed through oxidization, etc., on the surface of the first monocrystalline silicon wafer 11 or the second monocrystalline silicon wafer 12 is annealed to enhance adhesion at the bonding interface, and referring to FIG. 3, thereafter the non-bonded side of the second monocrystalline silicon wafer 12 is polished or etched to leave a relatively thin top silicon layer 12a on the insulating layer 14. The most important point in this method lies in the step of thinning the substrate.
The third method is referred to as “Smart Cut”, as mentioned in the solution disclosed in Chinese Patent Application No. 200710161139. As illustrated in FIG. 4, a first monocrystalline silicon wafer 20 is prepared; and an insulating layer 22 is formed on the bonded side of the first monocrystalline silicon wafer 20 through thermal oxidation, etc. Hydrogen ions 24 are implanted into the first monocrystalline silicon wafer 20 through the insulating layer 22 to form a uniform ion implanted layer 26. After ion implantation, the first monocrystalline silicon wafer 20 is subject to a thermal process, which is a process prior to a stripping process for reducing in advance the mechanical strength of the “implantation interface” of the ion implanted layer 26 and also for preventing a roughness increase of the surface of an SOI film resulting from stripping the “implantation interface” in the subsequent process. As illustrated in FIG. 5, after the surfaces of the first monocrystalline silicon wafer 20 and a second monocrystalline silicon wafer 30 are subject to a cleaning process, the first monocrystalline silicon wafer 20 and a second monocrystalline silicon wafer 30 are bonded tightly; and then a thermal process is performed to enhance the bonding strength of the insulating layer 22 of the first monocrystalline silicon wafer 20 with first the monocrystalline silicon wafer. Referring to FIG. 6, the silicon substrate on the ion implanted layer 26 of the first monocrystalline silicon wafer 20 is stripped mechanically from the first monocrystalline silicon wafer 20 to form an SIO wafer.
The existing three methods for forming an SOI wafer suffer from respective drawbacks. In the method of Separation by Implanted Oxygen, crystal lattices of the monocrystalline silicon wafer may be destroyed after oxygen gas implantation and annealing processes to thereby reduce greatly the insulating performance of the insulating layer and further reduce the quality of the SOI material.
In the method of “Bonding SOI”, the silicon substrate with a thickness up to approximately several hundreds of micrometers has to be polished or etched uniformly to several micrometers or even one micrometer or less, which may be technically of extremely difficulty in terms of controllability and uniformity and at a extremely high cost. Moreover, gaps may occur at the bonding interface during bonding for formation of an SOI wafer, for example, due to contamination on the bonding surface or unevenness of the bonding surface with poor evenness, to thereby influence the quality of the SOI wafer.
The method of “Smart Cut” demands for high precision of the process, which may be difficult and expensive to be implemented.